• DesignWare Foundation IP, including logic libraries and embedded memories, will deliver superior performance, power, and area on Samsung 8LPP process technology
  • ASIL D Ready DesignWare Foundation IP designed to meet automotive Grade 1 temperature (‑40C to +150C junction) requirements will accelerate ISO 26262 functional safety assessments and improve automotive SoC reliability
  • Collaboration builds on more than 10 years of success, resulting in billions of devices shipped with DesignWare IP on Samsung processes

Synopsys announced collaboration with Samsung Foundry to develop DesignWare® Foundation IP for Samsung’s 8-nanometer (nm) Low Power Plus (8LPP) FinFET process technology. Providing DesignWare Logic Library and Embedded Memory IP on Samsung’s latest process technology enables designers to take advantage of a reduction in power and area compared to Samsung’s 10LPP process. The DesignWare Foundation IP will be developed to meet strict automotive-grade requirements, enabling designers to accelerate ISO 26262 and AEC-Q100 qualifications of their advanced driver assistance system (ADAS) and infotainment system-on-chips (SoCs).

The DesignWare Logic Library and Embedded Memory IP will be available from Synopsys through the Foundry-Sponsored IP Program for the Samsung 8LPP process, enabling qualified customers to license the IP at no cost. The collaboration extends Synopsys’ and Samsung’s long history of working together to provide silicon-proven IP that helps designers meet their performance, power, and area requirements for a wide range of applications including mobile, automotive, and cloud computing.

Source: Synopsys Inc.