NetSpeed Systems announced a collaboration with Synopsys to enable generated RTL of NetSpeed’s interconnect IP to be used with Synopsys’ Platform Architect™ virtual prototyping solution. The collaboration enables the delivery of advanced interconnect solutions for leading advanced driver assistance systems (ADAS) and datacenter system-on-chips (SoCs) designs. The integrated solutions offer system designers the ability to simulate realistic system-level performance of their end product architectures.
Heterogeneous platform designs are becoming the norm for ADAS and data center SoCs because they offer higher performance and better power efficiency than multicore designs. However, heterogeneous designs are far more complex than multicore implementations due to the need to balance diverse processing and traffic needs.
To address the challenges of heterogeneous designs, NetSpeed offers a programmable, highly configurable cache coherent IP that enables SoC architects to create custom interconnect solutions to achieve optimal performance for their application. Synopsys, with its Platform Architect solution, offers system architects the ability to assemble and analyze system-level performance models before RTL is finalized.
The collaboration between the two companies allows the generated RTL of NetSpeed’s interconnect to be easily imported into Synopsys’ Platform Architect environment for architecture analysis. System designers can assemble their design by combining the NetSpeed interconnect with traffic generators and architecture models available in the Platform Architect model library. This flow enables early analysis of end-application performance and allows for highly efficient optimization of heterogeneous system architectures early in the design and months before system software or RTL availability.